The semiconductor industry is undergoing a tectonic shift, where the pursuit of transistor density has emerged as the primary lever for profitability. TSMC, the global titan of foundry services, is witnessing a critical inflection point: the 3nm process is beginning to displace its predecessor as the dominant revenue driver. This transition is being accelerated by an insatiable appetite for AI accelerators and high-performance computing (HPC). The economic center of gravity is shifting toward the extreme limits of miniaturization, fundamentally rewriting the rules of profitability for silicon fabrication.
For a long time, the 5nm process served as the bedrock of TSMC's revenue, accounting for 33% of the company's total turnover last quarter. However, market dynamics indicate a rapid surge in the influence of 3nm technology, with its share climbing from 25% in the first quarter to 30%. Analysts predict that by the second half of the year, this process will become dominant, finally pushing 5nm solutions into the background. To achieve this status, the 3nm segment must breach the psychological and financial threshold of 30% of total turnover, which in absolute terms translates to record revenues of $12.7 billion.
Nvidia remains the primary catalyst for this growth, continuing as the Taiwanese giant's largest customer in this segment. Yet, the technological transition extends to other industry titans, including AMD and Broadcom. Production capacity is scaling in lockstep with demand: while TSMC processed approximately 150,000 silicon wafers per month in the first half of the year, this figure is expected to rise to 180,000 by next quarter.
To sustain this momentum, TSMC is undertaking a massive infrastructure expansion. A new facility in the Tainan Science Park is slated to become operational in the first half of next year. Simultaneously, the company is diversifying its geographic footprint to mitigate geopolitical risks. Consequently, a second plant in Arizona, USA, will also specialize in 3nm production and begin shipments in the latter half of next year. Meanwhile, the JASM plant in Japan is expected to commence 3nm chip production by 2028.
Looking ahead, the trajectory points toward even more aggressive miniaturization. By 2028, the combined production volume of 3nm and the prospective 2nm processes is projected to reach 400,000 wafers per month. The industry is now transitioning into the "Angstrom era"—technologies that push boundaries even further below 2 nanometers. The adaptation of the A16 process for mass production is nearing completion within the current half-year.
This phase unlocks new opportunities for the market's most ambitious players. Alongside Apple and Nvidia, OpenAI is preparing for the adoption of A16. The company is developing its own "Jalapeno" chips; while the first generation relies on 3nm technology, subsequent iterations will merge the capabilities of A16 with advanced CoWoS (Chip-on-Wafer-on-Substrate) packaging. The latter is critical for integrating high-bandwidth memory (HBM), which is the cornerstone of modern neural network efficiency.
For Nvidia, the transition to A16 will provide the foundation for its next generation of hardware—specifically, GPUs based on the Feynman architecture and the Rosa series of CPUs. In this sense, TSMC's technological race is evolving into the strategic bedrock for the entire global AI infrastructure.
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