The global AI arms race has elevated high-speed memory to a critical determinant of computational competitiveness. As the industry pivots toward new standards, there is an increasing demand for deep customization of base dies tailored to specific client workloads. Samsung Electronics aims to disrupt this paradigm by establishing a fully vertically integrated production ecosystem for next-generation memory—a strategy engineered to secure a decisive technological edge for Nvidia by eliminating reliance on external foundries.
The evolution of High Bandwidth Memory (HBM) has reached a critical inflection point where off-the-shelf solutions can no longer keep pace with the voracious demands of modern neural networks. Starting with the HBM4 generation, the base die within the memory stack is evolving from a mere foundation into an active logic layer that must be meticulously optimized for specific GPU architectures. This shift has bifurcated the market: while players like SK hynix are compelled to rely on TSMC’s external capacities to produce these specialized layers, others are pursuing total vertical integration.
Samsung is opting for a path of technological sovereignty. The cornerstone of this strategy is the development of the NRD-K campus in Yongin, South Korea. This facility, which integrates research centers and production lines, was originally conceived as a hybrid site; however, current market dynamics are dictating new priorities. The second phase of the campus's construction may be repurposed from a pure R&D center into a full-scale contract manufacturing hub for 2nm base dies destined for next-generation memory stacks.
This transition is a strategic preparation for the launch of HBM5—a standard poised to deliver the next quantum leap in data throughput. Samsung intends to offer Nvidia a solution where the base die is manufactured using a 2nm process utilizing Gate-All-Around (GAA) transistor architecture. The shift to GAA is critical; this technology allows for far more efficient control of leakage current and increases component density compared to traditional FinFET transistors. It is this specific technological stack that is expected to drive a performance increase of over 50% for HBM5 relative to the HBM4E standard.
It is worth noting that the Yongin campus will not be a monolithic fabrication plant (fab) in the traditional sense. Due to spatial constraints, implementing a full silicon wafer processing cycle is unfeasible; instead, Samsung will focus on the most critical and specialized stages of the technical process. This approach allows the company to respond flexibly to Nvidia's requirements, creating customized chips with the agility of rapid prototyping but the precision of industrial-grade execution.
The scale of investment underscores the gravity of these ambitions: total infrastructure spending in Yongin is expected to reach $14 billion. By 2030, the company plans to launch three production lines, one of which was already completed in late 2024. The rollout of the second phase—which will serve as the foundation for 2nm die production—is slated for the second half of 2028.
Despite the ambition of the plan, Samsung is maintaining strategic flexibility. The decision to repurpose the second phase of NRD-K remains preliminary. Amidst the rapid transformation of the AI accelerator market, the company is prepared to adjust the site's purpose based on evolving memory requirements and any technological hurdles encountered during the pursuit of 2nm lithography. Nevertheless, the trajectory is clear: a drive toward total control over the value chain—from initial die design to the final assembly of the HBM5 stack.
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